Fix hybrid footprint for 5-pin MX switches.
This commit is contained in:
parent
cadf305a34
commit
69a819f5c9
File diff suppressed because it is too large
Load Diff
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@ -3,10 +3,12 @@
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"active_layer": 0,
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"active_layer_preset": "All Layers",
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"auto_track_width": true,
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"hidden_netclasses": [],
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"hidden_nets": [],
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"high_contrast_mode": 0,
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"net_color_mode": 1,
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"opacity": {
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"images": 0.6,
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"pads": 1.0,
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"tracks": 1.0,
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"vias": 1.0,
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@ -39,7 +41,6 @@
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11,
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12,
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13,
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14,
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15,
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16,
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17,
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@ -60,7 +61,9 @@
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33,
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34,
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35,
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36
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36,
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39,
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40
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],
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"visible_layers": "fffffff_ffffffff",
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"zone_display_mode": 1
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@ -1,5 +1,6 @@
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{
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"board": {
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"3dviewports": [],
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"design_settings": {
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"defaults": {
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"board_outline_line_width": 0.19999999999999998,
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@ -63,20 +64,26 @@
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"rule_severities": {
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"annular_width": "error",
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"clearance": "error",
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"connection_width": "warning",
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"copper_edge_clearance": "ignore",
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"copper_sliver": "warning",
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"footprint": "error",
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"footprint_type_mismatch": "error",
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"hole_clearance": "error",
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"hole_near_hole": "ignore",
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"invalid_outline": "error",
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"isolated_copper": "warning",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"length_out_of_range": "error",
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"lib_footprint_issues": "warning",
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"lib_footprint_mismatch": "warning",
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"malformed_courtyard": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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@ -86,9 +93,14 @@
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"padstack": "error",
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"pth_inside_courtyard": "ignore",
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"shorting_items": "error",
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"silk_edge_clearance": "warning",
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"silk_over_copper": "warning",
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"silk_overlap": "warning",
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"skew_out_of_range": "error",
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"solder_mask_bridge": "error",
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"starved_thermal": "error",
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"text_height": "warning",
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"text_thickness": "warning",
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"through_hole_pad_without_hole": "error",
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"too_many_vias": "error",
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"track_dangling": "warning",
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@ -97,7 +109,6 @@
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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"rule_severitieslegacy_courtyards_overlap": true,
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@ -107,18 +118,63 @@
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"allow_microvias": false,
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_connection": 0.0,
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"min_copper_edge_clearance": 0.09999999999999999,
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"min_hole_clearance": 0.25,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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"min_resolved_spokes": 2,
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"min_silk_clearance": 0.0,
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"min_text_height": 0.7999999999999999,
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"min_text_thickness": 0.08,
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"min_through_hole_diameter": 0.3,
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"min_track_width": 0.19999999999999998,
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"min_via_annular_width": 0.049999999999999996,
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"min_via_diameter": 0.39999999999999997,
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"solder_mask_to_copper_clearance": 0.0,
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"use_height_for_length_calcs": true
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},
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"teardrop_options": [
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{
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"td_allow_use_two_tracks": true,
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"td_curve_segcount": 5,
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"td_on_pad_in_zone": false,
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"td_onpadsmd": true,
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"td_onroundshapesonly": false,
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"td_ontrackend": false,
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"td_onviapad": true
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}
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],
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"teardrop_parameters": [
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_round_shape",
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"td_width_to_size_filter_ratio": 0.9
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},
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_rect_shape",
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"td_width_to_size_filter_ratio": 0.9
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},
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_track_end",
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"td_width_to_size_filter_ratio": 0.9
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}
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],
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"track_widths": [
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0.0,
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0.2032,
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@ -135,7 +191,8 @@
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"zones_allow_external_fillets": false,
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"zones_use_no_outline": true
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},
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"layer_presets": []
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"layer_presets": [],
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"viewports": []
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},
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"boards": [],
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"cvpcb": {
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@ -357,7 +414,7 @@
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"net_settings": {
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"classes": [
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{
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"bus_width": 12.0,
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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@ -371,10 +428,10 @@
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"track_width": 0.25,
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"via_diameter": 0.6,
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"via_drill": 0.4,
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"wire_width": 6.0
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"wire_width": 6
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},
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{
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"bus_width": 12.0,
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"bus_width": 12,
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"clearance": 1e-05,
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"diff_pair_gap": 1e-05,
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"diff_pair_via_gap": 0.25,
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@ -383,16 +440,15 @@
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"microvia_diameter": 0.2,
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"microvia_drill": 0.1,
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"name": "Min",
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"nets": [],
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.2,
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"via_diameter": 0.4,
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"via_drill": 0.3,
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"wire_width": 6.0
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"wire_width": 6
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},
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{
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"bus_width": 12.0,
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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@ -401,26 +457,45 @@
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "Power",
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"nets": [
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"+BATT",
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"+BATTA",
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"GND",
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"GNDA",
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"Net-(BATJ1-Pad2)",
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"Net-(BATJ3-Pad2)"
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],
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.5,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6.0
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"wire_width": 6
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}
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],
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"meta": {
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"version": 2
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"version": 3
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},
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"net_colors": null
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"net_colors": null,
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"netclass_assignments": null,
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"netclass_patterns": [
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{
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"netclass": "Power",
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"pattern": "+BATT"
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},
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{
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"netclass": "Power",
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"pattern": "+BATTA"
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},
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{
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"netclass": "Power",
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"pattern": "GND"
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},
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{
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"netclass": "Power",
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"pattern": "GNDA"
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},
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{
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"netclass": "Power",
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"pattern": "Net-(BATJ1-Pad2)"
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},
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{
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"netclass": "Power",
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"pattern": "Net-(BATJ3-Pad2)"
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}
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]
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},
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"pcbnew": {
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"last_paths": {
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@ -26,6 +26,8 @@
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(pad "" np_thru_hole circle (at 5.22 -4.2) (size 0.9906 0.9906) (drill 0.9906) (layers F&B.Cu *.Mask) (tstamp f2a44eaf-666f-422c-bb4d-a717499c3d1a))
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(pad "" np_thru_hole circle (at 5.5 0) (size 1.7018 1.7018) (drill 1.7018) (layers F&B.Cu *.Mask) (tstamp f565cf54-67ba-4424-8d47-087433645499))
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(pad "" np_thru_hole circle (at -5.5 0) (size 1.7018 1.7018) (drill 1.7018) (layers F&B.Cu *.Mask) (tstamp fe4869dc-e96e-4bb4-a38d-2ca990635f2d))
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(pad "" np_thru_hole circle (at -5.08 0 48.0996) (size 1.75 1.75) (drill 1.75) (layers *.Cu *.Mask))
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(pad "" np_thru_hole circle (at 5.08 0 48.0996) (size 1.75 1.75) (drill 1.75) (layers *.Cu *.Mask))
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(pad "1" thru_hole circle (at 3.81 2.54) (size 2.5 2.5) (drill 1.5) (layers *.Cu *.Mask) (tstamp 2d6db888-4e40-41c8-b701-07170fc894bc))
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(pad "1" thru_hole circle (at 2.6 5.75) (size 2.5 2.5) (drill 1.5) (layers *.Cu *.Mask) (tstamp babeabf2-f3b0-4ed5-8d9e-0215947e6cf3))
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(pad "1" thru_hole circle (at 0 5.9) (size 2.5 2.5) (drill 1.5) (layers *.Cu *.Mask) (tstamp edc9ab4f-487a-48dc-95f2-4d87f0e9cf9e))
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@ -26,6 +26,8 @@
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(pad "" np_thru_hole circle (at 5.22 -4.2) (size 0.9906 0.9906) (drill 0.9906) (layers F&B.Cu *.Mask) (tstamp f2a44eaf-666f-422c-bb4d-a717499c3d1a))
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(pad "" np_thru_hole circle (at 5.5 0) (size 1.7018 1.7018) (drill 1.7018) (layers F&B.Cu *.Mask) (tstamp f565cf54-67ba-4424-8d47-087433645499))
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(pad "" np_thru_hole circle (at -5.5 0) (size 1.7018 1.7018) (drill 1.7018) (layers F&B.Cu *.Mask) (tstamp fe4869dc-e96e-4bb4-a38d-2ca990635f2d))
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(pad "" np_thru_hole circle (at -5.08 0 48.0996) (size 1.75 1.75) (drill 1.75) (layers *.Cu *.Mask))
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(pad "" np_thru_hole circle (at 5.08 0 48.0996) (size 1.75 1.75) (drill 1.75) (layers *.Cu *.Mask))
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(pad "1" thru_hole circle (at 3.81 2.54) (size 2.5 2.5) (drill 1.5) (layers *.Cu *.Mask) (tstamp 2d6db888-4e40-41c8-b701-07170fc894bc))
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(pad "1" thru_hole circle (at 2.6 5.75) (size 2.5 2.5) (drill 1.5) (layers *.Cu *.Mask) (tstamp babeabf2-f3b0-4ed5-8d9e-0215947e6cf3))
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(pad "1" thru_hole circle (at 0 5.9) (size 2.5 2.5) (drill 1.5) (layers *.Cu *.Mask) (tstamp edc9ab4f-487a-48dc-95f2-4d87f0e9cf9e))
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